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Space Parts Working Group

Last month, Tekmos sent a representative to the annual meeting of the Space Parts Working Group. This is a meeting of government users of satellites, companies that make satellites, and component manufacturers that make parts for satellites. The meeting was for two days, and consisted of presentations from government users and the component manufacturers. It also presented a lot of networking opportunities.

Tekmos sells several products into the aerospace market. We are also working on upgrading our quality system from ISO9001 up to AS9100, which is now being required by some of our customers. After that, the next step is changing our products to offer an even higher level of reliability. And the first stage of that process is to determine what are the limits with current parts. And that is why we were at the Space Parts Working Group.

So, what did we learn? Being space related, radiation damage was a big topic. The higher the orbit, the greater the damage. As a subset of radiation, heavy ions are an increasing concern. Heavy ions are also a problem with the aviation market, and have been identified as a cause of commercial aviation engine failure in at least one instance. Another issue was bond wire integrity, as a result of corrosion, thermal cycle, and vibration during launch. And as with all semiconductor users, there were concerns about obsolescence and counterfeiting. These are all areas that will be addressed as we develop the next generation of Tekmos products.

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Analog Layout Approaches

Traditional analog layout uses what is called the full custom approach. Its advantage is that it generates the highest performance analog circuitry. The disadvantage is that it is very labor intensive, and takes a long time to complete. Analog circuitry frequently requires a second revision to adjust parameters. And with a full custom approach, that can mean extensive reworking of the layout, or even starting over.

A second approach is to use pre-existing analog cells. Unfortunately, they may not be optimized for a particular application, and may have to be redone to meet the application requirements.

Another approach is to use an analog array. The array consists of a mixture of transistors, resistors, and capacitors. The circuit is defined by the interconnect, which is typically done in metal or via fabric. Analog arrays generate acceptable performance with greatly reduced layout time and lower NRE charges. On the down side, the circuit is larger than a full custom part, and that adds to the volume production price. One of the main advantages of analog arrays is the savings in time. Not only is the layout time reduced, but frequently wafers can be started before the design is even finished. That is because the analog array contains sufficient flexibility to accommodate design changes to device sizes. Starting the arrays early can cut 4 to 5 weeks off of the wafer processing time. Also, the fab lot can be split, with some wafers held at the programming step, and that will allow a quick turn on the second revision as well.

Transistors

So what is an analog array? It begins with the need for analog transistors. While all transistors can be considered to be analog, it is frequently necessary in analog design for two adjacent transistors to have matching electrical characteristics. The better the matching, the better the analog performance. In the digital world, the only things that matter are speed and area, so very small transistors are used. But the smallest transistors will have the greatest mismatches, since naturally occurring edge variations are now a greater percentage of the transistor dimensions. These edge effects can be minimized by using larger transistors.

The next decision is to determine what size transistors need to be included in the analog array. In general, there is a need for a number of identical width transistors that can be used as building blocks. There is also a need for a limited number of much wider transistors that can be used as the input stage of op-amps and comparators. And there is a need for longer L devices that can be used in low power applications. There is another need for digital devices that can be used to switch the capacitors used in filters and integrators. But even this is complicated. They can be drawn with equal P and N sizes to minimize switching noise, or they can be drawn with equal strengths for less distortion.

Resistors and Capacitors

An analog array also needs capacitors. In general, you can use a value made up from multiple unit capacitors. But you may also need a few capacitors that are odd sized, for use in scaling capacitor arrays that are used in analog to digital converter arrays.

And we need resistors. Lots of unit resistors, with the unit being typically somewhere between 500 and 1000 ohms. The unit resistors can be combined in series and parallel to produce almost any desired value. There is also a need for larger value resistors. These might be well resistors, or specially implanted poly.

Tiles for Layout

It is convenient to group a select number of transistors, resistors, and capacitors, and group them together in a tile, and then use multiple instances of the tile to create the chip. Unfortunately, you will need more than one type of tile. For example, consider the needs of a band gap voltage reference. The bandgap design needs an array of bipolar transistors in order to work. Bandgaps are almost the only circuit element that needs this array of bipolar devices, and since you can generate multiple voltage references off of a single bandgap, you will likely only need one bandgap per chip. So it would be wasteful to include this bipolar array in every tile. There are several other cases where a specialized tile is a good idea. Even in a specialized tile, the other devices can be generic transistors that are programmed rather than being dedicated to a specific design.

Reducing the Overall Cycle Time

Well before the design is done, the designer will have a very good idea of the amount of circuitry required to complete the design. This makes it possible to combine multiple tiles and digital logic to create a structured array very early in the design process. This array can be started in the fab, and receive the first 5 weeks of processing while the design of the personalization layers is being completed. This can remove an additional month from the overall design cycle, reducing the time to market for the final system.

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Product Feature: TK68HC705C9A Microcontroller

Tekmos' expanded line of microcontrollers includes the replacements for the NXP (Freescale) MC68HC705C8A and MC68HC705C9A microcontrollers.

The TK68HC705C9A is an 8-bit microcontroller. The Tekmos TK68HC705C9A also has a configuration register that allows the part to be re-configured to replace both the MC68HC705C8A and the MC68HC705C12A. An interesting feature of the configuration register is that it changes the physical pinout of the TK68HC705C9A to match the pinout of the MC68HC705C8A.

The TK68HC705C9A uses Flash to replace the original EPROM program storage. This means that while the original parts were OTP (One Time Programmable), the Tekmos version is fully re-programmable. The TK68HC05C9A is a ROM version of the part that provides a low cost solution for high volume production.

Both the TK68HC705C8A and TK68HC705C9A are available in the 44-pin PLCC (FN), 40-pin PDIP (P) and space saving 44-pin PQFP (FB) packages.

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20th Anniversary

April marks the 20th anniversary of Tekmos' founding. Twenty years ago, James Betts and Lynn Reed left their jobs in California, moved to Austin, and started Tekmos. One of the more difficult things to do in a new company is to choose a name. We liked Tekmos, and when we googled it, there were no other hits, and we claimed it for ourselves.

Starting as a design center, we made the transition into a fabless semiconductor supplier two years later. We started by making digital ASICs, branched into Mixed Signal ASICs, and from there into standard products such as microprocessors, specialty memories, and peripherals. We also expanded from our original telecom emphasis into industrial, military, medical, and high temperature oil markets.

We just started work on our 830th chip. Looking back, it seems that our more interesting projects have all been related to either man-made or natural disasters.

In 2005, hurricane Katrina devastated New Orleans. This included the loss of the neighborhood phone switches. These switches relied on a custom chip that had been made at VLSI Technology, which had been acquired by Phillips, and whose fab had since been shut down. There was intense pressure to make 60,000 new chips, which were necessary for the full restoration of phone service in New Orleans. We got the job, since it had a mixed signal component, and so other companies declined to bid. The chip was a complicated one, with a lot of dual port RAM, and an embedded phase locked loop. We undertook a rush program to re-implement the design, and get it fabricated. Everything was expedited. This included working over the Christmas holidays, and putting in some very long days. In one event that stands out, we completed testing the first prototypes at about 2 AM on a Sunday morning. The customer purchasing agent was with us, and he arranged for a UPS pickup at that time, and the part to be flown directly to Mexico for assembly later on that day. We were surprised that such a thing could even be done. We delivered, and phone service was restored.

In 2011, the Tohoku earthquake occurred, which devastated the Japanese city of Sendai. Freescale had a fab in Sendai that was destroyed. The loss of that fab meant that they were unable to deliver what was to be a last time buy on microcontrollers to many customers. We set up an agreement with Freescale where we provided replacements for about 20 different microcontrollers. To do so, we designed a special gate array that contained ROM, EEPROM, and an ADC. This reduced our development time, and allowed us to switch devices part way through the manufacturing cycle if necessary in order to meet a particular demand.

One of the more difficult challenges was to recreate the 68020 microprocessor. The yield of this part was very sensitive to variations in poly sheet resistance, and the Sendai fab was the only Freescale fab capable of holding the required poly tolerances. And to complicate things, the original design documents had been lost. The only documentation available was the GDS data base and the production test vectors. All 51 of them. The chip had been designed using a combination of NMOS dynamic logic and CMOS static logic. Our design approach was to use our layout verification tool to extract the spice netlist from the layout. We then post processed the netlist to extract individual gates, and then to combine gates into higher order functions such as flops. We converted all dynamic logic into static logic, and re-implemented complex gates into collections of simple gates. And some of the complex logic gates were quite complex. Many of them had over 100 inputs. Then we began an iterative process, converting the production test into Verilog test bench vectors, and using them to check the design. Errors were corrected, and the simulations rerun to find the next error. When all of the errors were fixed. We made silicon.

We had many problems doing the 68020. The most difficult one was a case where the original design had transferred data onto a data bus, and left it there for a clock cycle. In essence, it was using the data bus as a dynamic 32-bit register. The circuit was not working, and we had a very hard time finding something that wasn't there. Once we realized what was going on, we had to add the register to make it work.

Not all disasters are caused by nature. Some are caused by men. One of our customers approached us with an obsolete FPGA that needed replacing. However, the original design files had been misplaced, and because of layoffs, the original engineers were gone as well. All that the customer had was the bitstream. In order to replace the design, we had to reverse engineer the bitstream. We would not do this if it were a case of someone trying to copy another design. But we will do it for the original owner. This was not an easy task. After deciphering the bitstream, we created a Verilog model of the FPGA, and loaded it with the bitstream. Then we used Synopsys to reduce the FPGA model to gates, which we then placed and routed.

This has been just a few of our stories. We have similar ones for each of the areas we operate in. Military stories, medical device stories, implantable stories, oil stories. Twenty years of stories. It has been fun and we look forward to the next twenty years.

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A New Revision to the TK89C668

Tekmos is pleased to announce a revision to the popular TK89C668 microcontroller. Based on the 8051 architecture, this 5-volt microcontroller offers 64K of program storage, an I2C controller, and 8K of XRAM.

The TK89C668 was originally made at Plessey Semiconductor. Plessey made the decision to discontinue foundry services, and so the part was switched to the 0.35u fabrication line at the X-Fab Dresden facility. Plessey had been using a similar X-Fab process in their factory, resulting in minimal process differences between the two foundries.

Since we were forced to retool at X-Fab, we took advantage of the situation, and corrected all known errata on the part. We also improved the RAM design by replacing a traditional RAM with one made out of latches that has a superior voltage and temperature operating ranges.

The new part has passed our qualification, and we are ramping up production. For further information, contact This email address is being protected from spambots. You need JavaScript enabled to view it..

The TK89C668 joins our TK80C186EB, TK87C751, and TK68HC711D3 families that have already been requalified at X-Fab. Our TK80C51 is currently being requalified, with an expected release this summer. That qualification will also result in the introduction of TK87C51 programmable versions of the 80C51.

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