A 68020 chip plot
In one of my earlier posts, I had included an image of the 68020. Unfortunately, that image did not make the transfer to the new software, so I am posting it again.
In this plot, metal shows up as red, and the transistors as white. The yellow areas are poly interconnect.
From the top, we have the micro and nano ROMs, followed by the random looking instruction decode and other control logic. The regular looking area across the lower middle is the execution unit / data path. Below that is the bus controller and the clock logic is at the bottom left.
My implementation will be done using a gate array approach, and will not be nearly as interesting to look at. But it will be much easier to make.