Replacing FPGAs with Low Cost ASICs
An FPGA based design can be converted into an ASIC, which can then be used as a drop-in replacement. FPGA conversions can be used as a cost reduction, for power reduction, to save board space, or as a solution to the problems of FPGA obsolescence.
It is not a direct path to map a given FPGA into an ASIC. The choice of the ASIC depends on the speed of the design in the FPGA, how large the design is, how much RAM is used, and how many pins are used. The ASIC cost depends on the ASIC size, the technology node, production quantities, and the package type. The cost also significantly depends on if the design can be implemented in an existing gate array, which can greatly lower the mask costs.
Is This Economical for Your Application?
We look at a breakeven point, defined as the number of devices necessary so that the production savings match the NRE. If this point is reached in 6 months of production volume, then a conversion makes economic sense. Of course there are other reasons to convert an FPGA into an ASIC. These include power reduction, package selection, avoiding SEU (Single Event Upset) issues, or design security.
To see the estimated breakeven volumes on your FPGA, click this button:
Need a Smaller Package?
Many of our arrays fit into QFN packages. And if you really need a small footprint, combine all of your components into a single System in a Package (SiP) with our Unify program.