FPGA Conversion Break-Even
We define a FPGA conversion break-even point as being the number of devices you need so that your savings equals the ASIC NRE investment. Mathematically, this becomes:
Break-Even Volume = NRE Charge
(FPGA Unit Price – ASIC Unit Price)
For example, Tekmos has a 256-pin gate array, with 400K gates, 12 18K block RAMs, and 4 DCMs. It will support circuits with a top clock rate of about 200 MHz. Most of the FPGAs we see will fit on this array. If the design fits on this gate array, then the following charges apply.
FPGAs Spartan List
The following table list a number of different Spartan FPGAs, and the estimated breakeven volume for each part. In general, if your volumes exceed the breakeven volume in 6 to 9 months, then an Spartan FPGA conversion into an ASIC makes economic sense for you. Click the corresponding Spartan FPGA to view the breakeven volumes.
|Spartan 2||Spartan 2E||Spartan 3||Spartan 3A||Spartan 3E|