|A Newsletter for the Semiconductor Industry|
Tekmos provides a fast and low cost solution to integrate customer designs into a small form factor package using its unique low cost die stacking capabilities. There is significant time to market advantages merging various chips into a vertical stack to optimize integration and eliminate large NREs and high risk. The Tekmos Unify solution includes a design and manufacturing service to handle all engineering from design through production shipment of final tested products. This service is ideal for companies wishing to integrate their standard ICs to permit more room for other features or special batteries to expand features and extend the operating life of their products.
|From the Desk of the President, Lynn Reed|
Word Line Drivers
In my last article, I discussed the design of the ROM bits. This article will cover the word line drivers.
Our ROM has 512 word lines. A brute force approach would use a 10-input AND gate to decode each word line, nine inputs for the address lines, and the tenth input to disable all word lines during precharge. But 10-input AND gates are both large and slow, so a better way must be used.
We use a 2-to-4 demuxer for eight of the address lines. The ninth address line is gated with the precharge. This allows a 5-input AND gate to be used instead of the 10-input gate. But this solution also has problems. In a NOR ROM, the word line drivers must be the same height as the ROM bit. And that is not enough room to put in a AND gate.
The next solution is to create a double height word driver that can decode both words. The schematic changes to a 4 input NOR gate that drives a pair of 2-input NAND gates, each driving a word line through inverters. This is a tight fit, but can be made to work by mirroring each dual word line driver so that they can share common supplies. Three of the four inputs of the NOR gate are common between the two mirrored drivers, and that saves more room.
The NOR and NAND gates are minimum sized devices, while the word line has 569 loads. In order to drive large loads, it is necessary to use a chain of inverters, each one being stronger than the preceding one. The optimum ratio between inverters is "e". But using "e" as the ratio results in a very large inverter driving the word line. And that means 512 large inverters for all the word lines.
We resolve this by letting the final ratio be a larger number. There is a tradeoff between reducing the inverter size, which increases the ROM access time, but reduces the area and reduces the peak current draws. After multiple spice runs, we set the output inverter ratio to be about 95:1. This also allows the inverter chain to be three inverters long. One thing that worked in our favor is that the bit cells start to conduct as soon as the word lines exceed the N-channel threshold, which is close to the starting voltage.
The address lines A6:A14 control the word decode. We have the option of latching them during the ROM read cycle, or not. If we choose to latch them, then we can either include the latches in the ROM core, or latch them externally. It is not required to latch the addresses, but it is safer to do so. Our final decision will be determined by the physical layout. If there is room for the latches, then we will add them. If not, we will leave that as an option for the chip level designer that uses this ROM core.
In the next column, I will cover the bit line muxes, the sense amps, and the ECC logic.
Read more of Lynn's blog...
Cyber Security & the Enigma Machine
Last week, a group of us went to San Antonio to attend an Institute of Electronics & Electrical Engineers (IEEE) lecture on cybersecurity and how the German enigma machine was cracked. The lecture was divided into two parts: how the Enigma machine actually worked, and how it was cracked.
The Enigma machine was quite clever, especially considering it was created back in the 1930s. Not only was there a large number of codes, the algorithm changed with each character. And the Germans used different codes for the Army, Navy, and Air Force, and different codes for different hierarchies within the armed services.
The lecture covered the machine's schematic, and how it worked internally. It was an electrical mechanical machine, and used three disks that electrically connected pairs of letters. The disks rotated with each key stroke, producing a different code for each character. Because the ultimate effect was to create a pair of letters that were swapped, the same machine could be used to encode or decode a message.
How the code was broken daily was equally interesting. Had the Germans followed their own rules, the code would have been almost unbreakable. But the Germans were sloppy with their procedures, and that made breaking the code easier.
As an example, there was a German outpost that sent the same status report daily when nothing was happening. Allied forces were instructed to leave this outpost alone, and not even overfly it. With nothing to report, sending the same message made it easier to decrypt the daily code. Another exploited weakness was that the Germans to end messages with "Heil Hitler". Knowing the last 10 characters was a great assist in cracking the code. These and other human errors had the effect of reducing billions of combinations down to more reasonable numbers, that could then be cracked through a trial and error procedure. And those lessons are still applicable today.
Summer Intern, Clayton Abel
Summer is over, and we have shipped our summer intern back to school. Tekmos hires engineering students for summer jobs. What they do depends on what they know. Freshmen run testers. Seniors assist designers. This year, we had one intern, Clay Abel. Clay just finished his junior year, and assisted in the characterization of our TK28F020 flash memory.
The main electrical specification for flash memories is the access time. It seems like a simple task, but it isn't. The actual access time varies slightly from pin to pin. It also depends on the previous data read from the part. And like all other measurements, it is a function of temperature, voltage, and output loading.
Our production testers measure access time. But there are delays to and from the pin electronics, and the tester capacitance is too high for the specified measurement. The data sheets also use a diode - resistor biased load to improve timing performance. Our task is to measure our parts under specified conditions, and use that information to set the tester parameters accordingly. It was Clay's job to make the measurements.
We rented a high-performance scope for the measurements. But could we trust it? So, Clay's first task was to measure the speed of light by looking at the propagation time of a signal down a 10-foot wire. It was in agreement with previous measurements. Had it not been, Clay could have gotten a Nobel prize in addition to a paycheck.
With the calibration out of the way, Clay spent the rest of his time making hundreds of measurements on multiple parts from multiple lots over the temperature and voltage extremes. Then he helped write the report that constitutes our product validation.
Clay did excellent work for us, and my only regret is that he will graduate in May, and no longer be available for summer work.
|Thank You for Reading Tekmos Talks|
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Tekmos, 20 years of solutions.
Lynn Reed, President
7901 E. Riverside Dr. Building 2, Suite 150