Tekmos' Blog

The concept behind a Unify SiP (System in a Package) is to stack die within a package using a Tekmos ASIC to include additional functionality and resolve testing and interconnect issues. Because this is a new approach to high density circuits, many are unaware of the details. This requires us to explain it through brochures and other marketing material.

Tekmos New SIP Business Card

The first step is to create a drawing that shows how everything fits together. We normally allow our outside artists considerable leeway in how they do our graphics. But in this case, we had to get it to be technically right. We asked our artist to draw a 4 chip Unify SiP, with our ASIC, a processor that was attached via flip-chip, an RF chip, and topped off with a MEMS. You can see the completed artwork below. We are going to use the artwork in a Unify brochure, on a business card sized brochure with a real chip for reference, and on our trade show booth.

Normally, images are drawn, which makes them hard to modify. We also asked our designer to create this image using 3-D Adobe software. This allowed us to make multiple changes in how the die were stacked and the relative sizes of the die. And it leaves the door open to future efforts to animate the drawing so that we can show how the die go together. We plan for the animation to be in the form of an animated GIF for the web, an animated PowerPoint slide, and perhaps a short video. And that's the background on our new Unify artwork.

A rapidly growing IoT area is IoT Wearables. Most people who are interested in sports, fitness, new electronic gadgets, or just observant have noticed the Fitbit. It is advertised a lot on Amazon. There are a wide variety of Fitbit products but they are certainly not the only maker of these electronic wristbands.

If one stops to think about wearing electronics, you realize it is not a new concept. The comic character Dick Tracy had a wiz bang wrist watch over 50 years ago. And it was connected to other remote devices too. What is different now is that these devices are real and available to anyone at a somewhat reasonable price. Another major difference from the past is that the connection to the internet opens up access from a device to virtually anywhere. Miniaturization of circuitry by technologies, such as Tekmos Unify, is necessary to allow the design of products that are small enough to wear.

While most of us have heard about devices such as Google Watch and Google glasses, the types of devices seem limited only by one's imagination. One of my personal favorites if the Fluffy tracker. This is a euphemistic name for a cat tracker that needs to be so small and lightweight that even a five-pound cat has no problem with it on their collar. Of course, it applies to any pet or even livestock. Another app that is intriguing is a wearable that takes thousands of body measurements and then recommends the most flattering clothing to buy online.

In mid-July, I went to the Wearables TechCon at the San Jose Convention Center. While not a huge conference, it was an eye opener as to the technologies necessary for wearables. Some products are just good ideas, such as linking a fob on your key chain to your smart phone so that either one can find the other if lost, or inexpensive glasses that show movies and give information. Spinoff ideas such as physiological analytics for analyzing exercise, stress, and recovery go well beyond the hardware to measure and track heartbeat. A similar idea is the real time monitoring of blood chemistry with non-invasive techniques with a wearable on one's arm. The number of companies and products needed to support the wearable products is amazing. Support areas such as flexible circuit boards and plastics to help designing products, testing services, and even universities were all represented at the conference.

There were a variety of seminars to increase one's knowledge and awareness of a field that is changing rapidly. A side benefit was an IoT Meet-Up where the main attraction was the demonstration of a set of clothes that could be used to develop natural moving avatars. Although this has been a staple of the imagery in game development, the low price of this product makes it affordable to many individuals rather than just the large game development companies. There are meet-ups on almost any topic, those on technology, especially IoT, are a great way to stay connected and current in a fast changing environment.

Production ASIC technology nodes range from 16nm up to 600nm, and the 10nm and 7nm nodes are nearing production status. With each decreasing technology node, in rough terms, the NRE doubles, the logic density doubles, and the wafer cost increases by ~25%. Going to a more advanced note can result in a cost savings as long as the volume compensates for the increased NREs.

There are two items that work against migrating to a more advanced node. The first is the anticipated production volume. Economically speaking, this can be phrased as how many production parts does it take before the unit cost savings equals the increase in NRE, and how long will it take to reach the breakeven point?

How long it takes to reach that breakeven point is important. A node selection that breaks even in 5 years is not economical. A project that breaks even in a few months is a no-brainer. Typically, an ASIC node selection needs to breakeven in under a year, with a 6 to 9 month period being ideal.

A second point to consider is that an increase in logic density at a given node does not always result in a lower cost die. A die consists of core logic that is surrounded by a pad ring that consists of the input / output buffers, the power bussing, and the scribe line (the space required to allow the die to be cut from the wafer). The I/O buffers have a minimum size that is necessary to withstand ESD damage. The pads have a minimum size because of assembly constraints. And together, this produces a pad ring that does not change size with differing technologies.

Consider the case of a 256 pin circuit with a 50u pad pitch. This die will be a minimum of 3.5 mm / side, and have a core area of 6.25mm². This tables show how many gates can be put into that 6.25 mm² space. So if a design has less than 400,000 gates, and if the 180 nm node will support the speed requirements, then there is no reason to use a smaller technology node.

Many Technology companies are spending significant money and the attention of high level managers. There are so many conferences and symposiums that one could make attending them a full time job. The need to stay current on developments is not limited to high tech companies. This article addresses one aspect of the Innovator's dilemma for companies that are not in the forefront of innovation.

The need to be aware of the developments in IoT is much greater than many companies realize. If part of your company makes garden variety electrical products, such as doorbells, you may wake up to the fact that companies, such as Ring, are making devices that let the homeowner see who is at the door on their smart phone, wherever they are. While these devices may be pricey now, it is the way things are going.

Many people remember when Kodak was almost the only name most people knew regarding taking family photographs. Of course, Polaroid was the name if one wanted the print almost immediately. Many young people do not even recognize these companies' names now. Business classes will probably study these cases and have opinions whether the companies could have adapted to the changing times better than they did.

Are sump pump manufacturers watching for the best time to have links to smart phones? What if your company has never considered having your sump pump send a text to the homeowner when the backup battery is low or about to fail? By the time you start developing a product to match your competition, they may have already made significant inroads to your market share.

There is no precise definition of IoT. Many consider it to include devices which may not actually be connected to the web. Self-driving cars and trucks are examples. The large manufacturers of cars and trucks seem to be closely attuned to technology advances but even that is not clear. Detroit was caught off guard when Japanese cars started to eat their market share. It will not be that long before self-driving cars are commonplace. One wonders if the changes in technology are really being tracked by all the supporting companies that supply both OEM companies and after-market companies. Today there are cars that can parallel park themselves. Which companies will lose market share when they are behind in making the electronics and software to let you summon your car from the parking lot to the mall entrance? It is not hard to imagine using Uber to get a ride and find that the car you summoned does not have a driver. If your company makes after-market parts for cars, you must keep up with the trends in retrofitting or have your competition steal your customers.

There are many technology nodes available today, ranging from the most advanced 16 nm up through 1 u. So which one should you use for your ASIC? The answer depends on a combination of circuit size, speed requirements, and production volumes.

The biggest downside for the advanced technology nodes is the cost of the masks necessary to fabricate the wafers. The mask cost tends to double for each successive technology node, and is in the millions of dollars for the most advanced nodes. The manufacturing cycle is also longer for the more advanced nodes.

The advanced nodes offer greater circuit density, with the density roughly doubling for each node. This reduces the manufacturing costs, but are the savings worth the extra NRE charges?

And there is the issue of circuit speed. A DDR4 interface needs at least 65 nm for implementation. A PCIe G3 needs 28 nm. And a mixed signal part can be successfully implemented at 180nm or less. The application sets a lower limit on the technology node.

So how do you determine the optimum node? First, let the speed set the lower limit. And trade off the manufacturing cost versus the NRE cost for your anticipated volume. As a rough rule of thumb, the manufacturing savings should pay for the increase in NRE charges within 6 months.