Tekmos provides ASICs in multiple technologies to meet the diverse needs of our customers. We have developed the capability to provide ASICs in any volume while minimizing the NRE charges.
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The smaller “L’s” and thinner oxides associated with advanced technologies generally require lower operating voltages. And that makes them inappropriate for use as replacements for older, 5 volt circuits. Tekmos had pioneered a technique of utilizing the second oxide found in most processes as a means of using newer technologies to create circuits that operate safely at the older 5 volt standards.
Tekmos is well positioned to meet your mixed signal requirements. Most of the Tekmos gate arrays contain small analog arrays for use in mixed signal applications, and that can reduce the NREs substantially. We can interface at any level, from doing everything, or as little as implementing your physical layout.
Tekmos has two approaches to high temperature operation. Our basic 0.35u ASIC process performs well up to 200C operation. Above there, the leakage currents become noticeable and may affect circuit operation. We can use our 1.0u SOI process to achieve 250C operation. Tekmos also has procedures for the testing of our EEPROMs to insure longer data retention at elevated temperatures.
While operating voltages have been declining with each new process technology node, there are still applications that require higher operating voltages. These can range from analog designs that need high voltage, and to mature products operating off of 10 volt supplies.
Our 0.35u process works for digital operation down to 1.5 volts. This provides a good solution for battery powered applications.
An FPGA based design can be converted into an ASIC, which can then be used as a drop-in replacement. FPGA conversions can be used as a cost reduction, or as a solution to the problems of FPGA obsolescence.
The semiconductor industry is volatile, and many ASIC manufacturers are either no longer around, or are not offering ASICs any more. So what do you do if you need more parts? You come to Tekmos.
Our US fabrication and assembly capability provides a secure path for military components. This is also supported by our high temperature and high voltage work, and by our manufacturing technology that supports limited volume manufacturing runs.
Tekmos has access to fabrication technologies ranging from 28 nm up to 1.0u SOI. We can match the technology to your application.
Tekmos can put multiple designs on the same die. Similar in approach to a MPW (Multi-Project-Wafer), but it avoids the wasted die. And it allows us to allocate the die from the wafer run to meet the exact needs of our customers.
Stacked die is an assembly technique where two or more die are stacked and bonded in a single package. This was originally developed as a method of putting two memory chips in a single package to double the memory density. The term “stacked die” is often used whether the second die is on top of the first die or next to it. Today, the technology has progressed so that many die can be stacked, with the total limited by the package thickness.
Tekmos works with the customer’s engineering group to determine the best package for the application, including the projected future availability of the package type.